1. Field of the invention
The present invention relates to a charge transfer device for use in a solid state image sensor, and more specifically to a floating diffusion type signal charge detection circuit for use in a charge transfer device.
2. Description of related art
One typical example of a charge transfer device used in for example a linear or area image sensor comprises a CCD (charge coupled device) shift register formed together with an image sensor cell array so that signal charges stored in the image sensor cell array are transferred to the CCD shift register, and then transferred through the CCD shift register by applying a multi-phase transfer pulse to transfer electrodes of the CCD register. The signal charges transferred through the CCD shift register are serially outputted from an output gate electrode provided adjacent to a transfer electrode formed on a charge transfer region of a final stage of the CCD shift register.
A floating diffusion is provided adjacent to the output gate electrode. The floating diffusion forms a source of a reset MOS transistor, which is used to bring a potential of the floating diffusion to the same as that of the drain of the reset MOS transistor before each time the signal charge is transferred to the floating diffusion. In addition, the floating diffusion is connected to an input of an amplifier circuit, which is formed of, for example, a source follower.
In the above mentioned floating diffusion type signal charge detection circuit for use in the charge transfer device, when a transfer pulse of the transfer electrode of the final stage of the CCD shift register is maintained at a high level, a reset pulse of a high level is applied to a gate of the reset MOS transistor so as to turn on the reset MOS transistor, so that the source voltage of the reset MOS transistor, namely the voltage of the floating diffusion, called V.sub.p here, is brought into the same potential as a drain voltage V.sub.RD of the reset MOS transistor. Thereafter, the reset pulse is brought into a low level so as to turn off the reset transistor, so that the floating diffusion is put into a floating condition. In the condition, the transfer pulse of the transfer electrode of the final stage of the CCD shift register is brought to a low level, so that signal charges stored in the transfer electrode of the final stage of the CCD shift register is caused to flow, through a channel formed under the output gate, into the floating diffusion. As a result, a potential change .DELTA.V out is caused in the floating diffusion by the inflow signal charges, and the potential change .DELTA.V out forms a signal output.
In the above mentioned arrangement of the signal charge detection circuit, however, since a coupling capacitance exists between the gate of the reset MOS transistor and the floating diffusion, when the reset pulse is brought from the high level to the low level, the potential of the floating diffusion sustains a potential drop .DELTA..phi..sub.R called a "reset feedthrough noise". In ordinary cases, this potential drop .DELTA..phi..sub.R due to the "reset feedthrough noise" is a few hundreds millivolts, which is a substantial value in comparison with a net signal output voltage .DELTA.V out which is in a range of a few tens millivolts to a few hundreds millivolts.
Generally, the signal output is supplied through a sample/hold circuit to an A/D (analog-to-digital) converter. In this case, in order to cause a level of the signal output to adapt to an input level of the A/D converter, the signal output is amplified by an amplifier. For example, if the signal output .DELTA.V out is on the order of a few tens millivolts, the signal output is amplified a few tens times. In this amplification, the reset feedthrough noise .DELTA..phi..sub.R is also amplified a few tens times, so that the component of the reset feedthrough noise .DELTA..phi..sub.R reaches a few tens volts.
In general, since the amplifier connected to the signal charge detection circuit is required to have a wide dynamic range and an excellent frequency characteristics, an amplifier capable of complying with a large signal becomes high in cost. As a result, the degree of amplification in the amplifier actually had to be limited within a range of several times. In this case, however, if the level of the signal output is low in comparison with a reference voltage of the A/D converter, a quantizing error becomes large and a S/N (signal-to-noise) ratio lowers. In order to solve this problem, it may be considered to lower the reference voltage of the A/D converter. However, this method is not preferable, since the precision of the A/D convertor lowers, with the result that the S/N ratio lowers.